With the considerable technological advances, computing devices have become more common resulting in a sizable increase in use. To address this increased use, there has been a lingering quest to increase the speed and processing power of the transistor-based computational architecture. According to “Moore's law,” computing power doubles every 18 months. However, it is widely believed in the semiconductor community that further enhancement of the most elaborate silicon transistor—CMOS, is coming to the end. This end of scaling will be due to several concurrent fundamental and practical limits related to transistor operation and manufacturability. Fundamental limits include sustaining viable transistor operation and limiting thermal dissipation to manageable limits, both of which are common to all charge based logic devices and independent of device structure and material properties.
Utilizing electron spin for information encoding and information transmission creates somewhat a viable solution. Spintronics is a new approach to electronics, where the information is carried out by the spin of the carrier, in addition to the charge. In spin-based semiconductor logic devices, the carrier transport depends on the spin, not the charge, of the carrier. Generally, spintronic architectures operate according to the common scheme: (i) information is stored into the spins as a spin orientation (e.g., along with or opposite to the external magnetic field), (ii) the spins, being attached to carriers, transfer information from one spin-based device to another through a conducting wire, (iii) spin polarization of the transmitted carriers affects the conductance of the recipient device, and (iv) information is read at the output terminal. Although the performance of the spin-based devices might be advantageous, the use of charge transfer for information exchange between the devices significantly limits the performance of the spintronic architecture. Hence, there remains an unmet need in the art.